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Real Time Clock Intersil ICM7170 brief reference

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Features

1. 2 time-of-the-day clocks with hundredths of seconds, seconds, minutes, hours, day of the month, day of the week and year.
2. latched operation for synchronized access
3. 12 hours cycle or 24 hours cycle
4. selectable frequency input
5. test mode
6. programmable date/time alarm

Registers

Address bits A0-A4 select one of the 18 registers:

00000	Hundredths of seconds (0-99)
00001	Hours (0-23 or 0-11 in 12 hours cycle, with bit 7 = 1 for PM)
00010	Minutes (0-59)
00011	Seconds (0-59)
00100	Month (1-12)
00101	Day (1-31)
00110	Year (0-99)
00111	Day in the week (0-6, 0 = Monday)
01000	Alarm: Hundredths of seconds (0-99)
01001	Alarm: Hours (0-23 or 0-11 in 12 hours cycle, bit 7 = 1 for PM)
01010	Alarm: Minutes (0-59)
01011	Alarm: Seconds (0-59)
01100	Alarm: Month (1-12)
01101	Alarm: Day (1-31)
01110	Alarm: Year (0-99)
01111	Alarm: Day in the week (0-6, 0 = Monday)
10000	Alarm control
10001	Command Register

Reading the Date/Time

Read register 0 (hundredths of seconds) to latch a complete date/time
in registers 0-7. Counting is not interrupted by the operation.

Setting the Date/Time

The processor has to write the latches in registers 1-7 before setting
a coherent date/time when writing to register 0.

Command Register

b1,b0 	frequency divider (00: divide by 1)
b2	24 hours cycle (0: 12 hours, 1: 24 hours)
b3	clock enable (0: stop clock count, 1: enable clock count)
b5	test mode (1: accelerated mode (100x), 0: normal mode)

Alarm operation

The alarm clock operates in a similar way than the primary clock.
However, register 10h allows to enable alarm events. An interrupt will
be generated for each time an enabled alarm event occurs.
Individual event bits are : hundredths overflow (one event every second)
seconds overflow (every minute), minutes overflow (every hour), hour
overflow (every day), day of the week overflow (every monday), day
overflow (every month), month overflow (every year).
The interrupt is reset by reading the alarm control register.